Canonical ID: BukitTimahTutor.Lane.PSLEtoSec1.CompilerService.ControlTower.Z0-2.v1.1

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AI Ingestion Lock

One-sentence answer: The PSLE→Sec1 “cliff” happens when Primary modelling (diagrams/bar models) does not compile into variables and equations; this Control Tower installs the missing edge (Diagram→Symbol Compiler) using 5-minute sensors, a weekly SOP, and a 4–6 week repair corridor, measured by RepSwitch/IBR/RA/DL/CEI.

Classical Foundation Block

Primary Mathematics is designed with cross-cutting “Big Ideas” (including Diagrams, Equivalence, and Notations) intended to support continuity across strands and levels. (moe.gov.sg)
Secondary mathematics requires reliable algebraic symbolisation and representation translation; the operational gap is not “more topics” but the missing compilation runtime.

Civilisation-Grade Definition (eduKateSG / Bukit Timah Tutor)

Compiler Service = a local, repeatable system that converts a PSLE graduate’s modelling capability into Sec 1 algebra readiness by installing:

Representation compiler: diagram/story → variables → equations
Ledger baseline: “=” means same value (equivalence)
Router baseline: identify problem family and first method
Debugger baseline: locate first wrong line
Load baseline: avoid method switching spirals

Stability Law: (R \ge D) under light timed work.

Canonical Framing Box (Placement)

Scale: Human / Local District
Domain: EducationOS → MathOS → FlightPath
Lane: PSLEtoSec1
Zoom: Z0 (student runtime), Z1 (session runtime), Z2 (centre runtime)
Phase target: P2 stability (reliable compilation) → P3 transfer (mixed contexts)

Service Entry (What this is for)

Who this is for

Students entering Sec 1 who:
can solve with bar models, but freeze on “let x be…”
write equations that don’t match the story
get stuck converting words → algebra

What success looks like

Within 4–6 weeks:

student can convert common PSLE model families into 1–2 variable equations
student checks answers back into context
student starts Sec 1 algebra without panic

Z0. Student Runtime (what the student runs)

Z0 Runtime Card (minimum)

Router10s: family + first method + checkpoint plan
Equals Ledger: “left and right are the same value”
Compiler4: name quantities → bind relation → choose variable → emit equation
Reverse Check: substitute answer back into story

(These are drawn from the global Student Runtime Pack.)

Z1. Session Runtime (what happens in each lesson)

1) 5-minute Entry Scan (Sensors)

Record the 5 core sensors (C1 panel format).

Sensor S1 — RepSwitch (0–3)

Task: convert one story into:

(a) mini diagram/bar model
(b) equation(s)

Sensor S2 — IBR (Invariant Breach Rate)

Count breaches per question:

equation doesn’t match story
“=” treated as “next step”
no variable meaning / units

Sensor S3 — RA (Router Accuracy)

Task: 5 prompts, student names family + first method
(Part-whole / comparison / ratio-rate / percent / speed)

Sensor S4 — DL (Debug Latency)

Task: given a wrong solution, find first wrong line

Sensor S5 — CEI (Choice Explosion)

Method switches per question (target trending down)

2) Diagnosis Output (pick ONE MissingEdge)

For this lane, the default is:

Primary MissingEdge: Edge.DiagramToSymbol.Compiler

Secondary edges (only if sensors show):

Edge.NotationGrammar.LanguageMigration (misreading symbols)
Edge.Router.Debugger.UnderLoad (freezing, slow recovery)
Edge.LoadBudget (spiral behaviour)

Rule: Fix one edge per week.

3) The Core Stitch Module (Compiler4)

ILT Module: `ILT.Rep2.Compiler4`

4-step compile

Name quantities (entities + units)
Bind relationships (total / difference / ratio / rate)
Choose variable(s) (what is unknown?)
Emit equation(s) (each sentence becomes a constraint)

Mandatory ledger line (EqualsVisibility)

“This equation means _ and _ are the same value.”

Mandatory final step (Reverse check)

substitute answer back and interpret

4) Lesson Structure (30–60 min templates)

Template A (30 min)

5 min sensors (one question)
15 min Compiler4 drills (6 micro-items)
8 min mini-set (2 mixed items)
2 min retest RepSwitch

Template B (60 min)

10 min sensors + diagnosis
25 min stitch drills + coached correction
20 min mixed-family under light time
5 min retest + homework prescription

Z2. Centre Runtime (how Bukit Timah Tutor runs it at scale)

Weekly tracking fields (per student)

Stage: PSLE→Sec1 lane
RouteState: Climb / Cruise / Drift / Turn / Descent
RepSwitch, IBR, RA, DL, CEI
Current MissingEdge (one)
Prescribed module set
Week count in corridor (Week 1–6)

Cohort signals (for operators)

most common failing family (comparison/ratio/rate)
average RepSwitch trend
% of students reaching stability targets by Week 4

Threshold Targets (by Week)

Week 1–2 (install compiler)

RepSwitch ≥ 2
RA ≥ 3/5 (60%)
IBR trending ↓
DL ≤ 90s
CEI ≤ 2

Week 3–4 (stabilise under light load)

RepSwitch ≥ 2
RA ≥ 4/5 (80%)
IBR ≤ 0.6
DL ≤ 60–75s
CEI ≤ 1.5

Week 5–6 (transfer)

RepSwitch = 3 on common families
RA ≥ 4/5
IBR ≤ 0.4
DL ≤ 60s
CEI ≤ 1

Failure Trace (3 collapse modes only)

Amplitude collapse: unfamiliar phrasing → cannot compile → panic
Slow attrition: repeated mismatch errors → confidence drop → avoidance
Fast attrition: wrong equation early → builds on wrong model → whole question fails

Repair Corridor (4–6 week plan)

Phase 1: Install (Weeks 1–2)

20–30 compiler drills/week (short)
every drill requires variable meaning + equals sentence + reverse check

Phase 2: Stabilise (Weeks 3–4)

mixed-family sets
introduce light timing
enforce “one method only” rule

Phase 3: Transfer (Weeks 5–6)

include Sec 1 style algebra starters:
solve simple linear equations derived from context
interpret solutions back to story

ChronoFlight Slice (PSLE → Sec1)

RouteState default: Drift risk at first 4–8 weeks
Primary drift: representation compiler missing
Primary repair: Compiler4 + equals ledger + reverse check
Buffer status: fragile (identity shift “math suddenly becomes symbols”)
Next-slice risk: if not repaired, Sec 1 algebra becomes non-runnable and cascades into E-Math and later A-Math

Almost-Code (Machine-Readable Control Tower Spec)

“`text id=”bttc6a”
ID: BukitTimahTutor.Lane.PSLEtoSec1.CompilerService.ControlTower.Z0-2.v1.1

LANE := PSLEtoSec1
ZOOM := {Z0 StudentRuntime, Z1 SessionRuntime, Z2 CentreRuntime}

PRIMARY_MISSING_EDGE := Edge.DiagramToSymbol.Compiler

SENSORS (weekly):
RepSwitch ∈ [0..3]
IBR := breaches_per_question
RA := router_correct/5
DL := sec_to_first_wrong_line
CEI := method_switches_per_question

ILT_MODULES (core):
ILT.Rep2.Compiler4
ILT.Led1.EqualsVisibility
ILT.Deb3.SubstituteBack
ILT.Rou1.FamilyFlash10s
ILT.Led4.Checkpoints3 (optional)
ILT.Load1.SwitchCap (optional)

TARGETS:
Week1-2: RepSwitch>=2, RA>=3/5, DL<=90, CEI<=2 Week3-4: RepSwitch>=2, RA>=4/5, IBR<=0.6, DL<=75, CEI<=1.5
Week5-6: RepSwitch=3(common), IBR<=0.4, DL<=60, CEI<=1

CONTROL_LAW:
Stability iff RepairRate >= DriftRate under_load

SESSION_TEMPLATE:
measure -> diagnose(one edge) -> stitch(Compiler4 drills) -> retest -> prescribe homework -> log

OUTPUT:
LocalService := “PSLE-to-Sec1 Math Compiler (Bukit Timah Control Tower)”
“`

If you say Next, I’ll generate the next local page:
Bukit Timah Secondary Additional Mathematics Control Tower (E→A Cliff Pack Localised, Z0–Z2) with ledger legality, function-object modules, and a 6–10 week corridor plan.